Customary encoding or numerical value representation in present day data processing apparatus adopt a binary representation in which the left-most bit of a given sequence is the sign bit and all bits to the right of the sign bit correspond to the operand. It is a generally employed practice that the sign bit be a zero for a positive number and a one for a negative number, with the remaining digits indicating the presence of absence of powers of two.
In order to carry out (floating point) arithmetic operations within the processor, it is necessary to normalize or scale the operands of the numbers to be processed. Examples of floating point control networks including associated normalization circuits are described in the U.S. Pat. Nos. to Tate et al 3,831,012, Voltin 3,193,669, Alrich et al 3,022,006, Hertz 3,304,417 and Marette 3,198,938. For positive numbers scaling is usually effected by counting (through a left shift process) the number of places (zeros) to the right of the left most bit until a one is encountered. Typically a counter within the normalizer circuit is incremented for each shift so as to provide a measure of the scale factor. For negative numbers, expressed in binary one's complement notation, the zeros represent significant digits and, after complementing the number, the same process described above for positive numbers is carried out to accomplish the normalizing. Namely the same normalization circuit can be used for both positive and negative numbers (with negative numbers being complemented prior to scaling). If, however, the number to be normalized is a maximum negative number (namely, one which cannot be represented as a positive number in the same precision), the value of the scale factor in the normalization counter will be in error. Conventionally, when a maximum negative number is encountered, correction for the above error is an after-the-fact exercise, requiring extra cycles of processing time during which renormalization of the maximum negative number is carried out.